Integrated Group III-Nitride Gate-Protected High Electron Mobility Transistors with Gate Overdrive Immunity
Providing gate protection to a group III-semiconductor device by delivering gate overdrive immunity is described herein. The gate protection can be achieved by embedding a gate-voltage-controlling second transistor to the gate electrode of a first transistor. In other words, a first gate electrode of the first semiconductor device is in series with a second source electrode of the second semiconductor device, and a second gate electrode of the second semiconductor device is connected to the second source electrode and the first gate electrode.
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USA
Invention Code:
TTC.PA.628
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okt@ust.hk
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TAP - Microelectronics
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