Thermal-Enhanced and Cost-Effective 3D IC Integration with TSV (Through Silicon Via) Interposers and High-Performance Packaging
An apparatus having a three-dimensional integrated circuit structure is described herein. The apparatus include an interposer for carrying a plurality of high and low-power chips. The high-power chips are attached and connected to one side of the interposer, while the low-power chips are attached and connected to the other side of the interposer. In generally, the high-power chips produce more heat than does the low-power chip during their operations. The interposer further include through silicon vias and redistribution layers for connecting the chips on both surfaces. In addition, the interposer assembly is attached and connected to a substrate layer, which is in turn attached and connected to a printed circuit board. In order to provide improve thermal management, the interposer surface carrying the high-power chips are oriented away from the circuit board. A heat spreader is attached to the back sides of the high-power chips for dissipating the heat.
Countries or Regions:
USA
Invention Code:
TTC.PA.409
Contact Us:
okt@ust.hk
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Key Features:
Specification:
Category:
TAP - Microelectronics
Reference:
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